Extended UART design process, principle and examples

The Universal Asynchronous Receiver/Transmitter, commonly known as UART, is a crucial component in computer hardware that facilitates asynchronous serial communication. It serves as a bridge between parallel and serial data formats, converting input signals from parallel to serial for transmission. Typically integrated into other communication interfaces, the UART can be found as a standalone chip or embedded within a microprocessor. Most commonly, it complies with the RS-232C standard and is often paired with signal level conversion chips like the MAX232 from Maxim to interface with external devices. In modern industrial applications, many microprocessors are equipped with only two UART ports. This limited number often becomes a bottleneck when more serial communication channels are needed. To address this, expanding the UART interface has become a practical solution. With the increasing use of SPI and I2C buses in microcontroller systems, leveraging these buses for UART expansion not only optimizes resource usage but also enhances system flexibility. This paper presents an effective method for expanding the UART interface using the SPI bus, with the SC16IS752 chip serving as the core component. The SC16IS752 offers a standard SPI interface and allows for the expansion of two high-performance UART channels, supporting data rates up to 5 Mbps. In addition, it provides eight programmable I/O pins and supports IrDA communication at up to 115.2 kbps. Its features include automatic flow control, RS485 support, and software reset, making it a versatile choice for UART expansion. The design is simple, cost-effective, and highly adaptable, making it ideal for a wide range of applications. The paper also discusses the practical implementation of this expanded UART interface in a wireless data collection concentrator, where the extended UART port is used to connect wireless modules for efficient data acquisition and communication. **SPI Bus** The Serial Peripheral Interface (SPI) is a synchronous communication protocol developed by Motorola. It is known for its robust hardware capabilities, which simplify the associated software development [2]. SPI typically requires four signal lines: SCK (Serial Clock), MOSI (Master Out Slave In), MISO (Master In Slave Out), and CS (Chip Select). These lines enable master and slave devices to communicate in a synchronized manner. There are four operating modes, and this paper utilizes one of the primary configurations. **SC16IS752 Expansion Chip** The SC16IS752, developed by NXP, is a versatile UART expansion chip that supports both SPI and I2C interfaces [3]. It expands two high-speed UART channels, achieving data transfer rates of up to 5 Mbps. Additionally, it includes eight programmable I/O pins and supports IrDA communication at 115.2 kbps. Other advanced features include hardware and software flow control, automatic RS485 support, and a software reset function. The pin layout of the SC16IS752 is straightforward, as illustrated in Figure 1. The XTAL1 and XTAL2 pins are used for connecting a crystal oscillator circuit, while the CS/A0 pin serves as either a chip select for SPI or an I2C device address selection. The I2C/SPI pin determines the interface mode, and the IRQ pin is used for interrupt signaling. The remaining pins handle the expanded UARTs and I/O functions. Connecting the microprocessor to the SC16IS752 is straightforward, especially when an SPI interface is available. If SPI is not present, the functionality of an analog SPI port can be emulated using general-purpose I/O pins, further enhancing the chip’s versatility in various system designs.

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