Compared with Xilinx and Altera's two FPGAs (Programmable Logic Gate Array), LatTIce began to fully develop into consumer electronics after acquiring Silicon Blue. There has always been a very bright performance. The iCE40 series product line has a considerable market base in many consumer electronic terminal products. According to Chen Yingren, senior business development manager of Lattice Semiconductor Asia Pacific, the iCE40 product line has been continuously innovating, including Lite, Ultra, and new. The UltraPlus is launched with more than one million shipments per day.
Chen Yingren, Senior Business Development Manager, LatTIce Asia Pacific
Recently, LatTIce held a media communication meeting in Shanghai to officially launch the newest member of the iCE40 Ultra product line, the iCE40 UltraPlusTM FPGA, which is one of the most energy efficient programmable heterogeneous compuTIng (MHC) solutions in the industry.
More storage space, more DSP
Chen Yingren, senior business development manager for Lattice Asia Pacific, points out that mobile applications are increasingly demanding distributed processing, and Lattice's iCE40 UltraPlus devices are optimized to meet these needs. As the newest member of the iCE40 UltraTM product family, the iCE40 UltraPlus FPGA meets DHP (Distributed Heterogeneous Processing) computing needs, helping design engineers achieve lower power consumption solutions with up to 8x storage compared to previous generations And 2 times the DSP. In addition, it has more logic resources, quiescent current still only needs 75Î¼A, while the previous generation's quiescent current is 71Î¼A.
Chen Yingren further said that the new iCE40 UltraPlus FPGA also adds programmable I/O for design flexibility, an I3C interface for always-on-line camera applications (new high-bandwidth data and control sensor interfaces defined by MIPI), and built-in The oscillator reduces power consumption and BOM cost.
Chen Yingren said that the feature-rich iCE40 UltraPlus FPGA has a static power consumption as low as 75Î¼A and a package size as small as 2.15x2.55mm, making it suitable for consumer electronics applications where power consumption is minimal and space is limited. The device is also available in a QFN package to support low-cost PCB assembly for industrial and other consumer electronics applications. To accelerate product development, Lattice offers a complete suite of tools and evaluation samples and development boards for the iCE40 UltraPlus FPGA family.
Helping customers accelerate innovation
Imagine a scenario where users can interact with mobile smart products without touching them. The iCE40 UltraPlus device provides the responsiveness needed to achieve this. Next, Chen Yingren introduced different application scenarios for media friends. He said that these application scenarios Lattice have reference designs or concepts, and it is very important to cooperate with customers to make solutions.
The first application scenario is to make an image sensor connection. Chen Yingren said, "Because this is a small FPGA, the speed runs very fast, this is only 108M and only one way, so UltraPlus connects a single main processor in a sleep state, low power camera With the FPGA open, once the phone is lifted, the camera and FPGA algorithms detect a shape similar to the face, he will inform the main processor that the owner may start using the phone, and then the main processor will process and recognize Is it true master? There is gesture recognition, bridging, motion detection, distance calculation, etc., FPGA can do it."
The second is the display application. The iCE40 UltraPlus FPGA supports real-time working displays with its large on-chip SRAM, while the application processor is still in sleep mode. At the same time, the iCE40 UltraPlus FPGA can also bridge between the MCU and the display. The FPGA supports MIPI DSI or parallel interfaces to provide flexibility for custom graphics acceleration and I/O expansion. The combination of display drivers and graphics engines is comparable to low-cost GPUs, while power consumption is greatly reduced.
In the iCE40 series, UltraPlus is the first to directly support MIPI screens. Because of its low power consumption, the main application scenario is in wearable devices.
The third is the audio application. Today's systems often require enhanced audio processing to separate specific audio signals from high noise environments. A typical application is that the system must detect and accept voice commands from a person in a room where multiple people are talking.
However, most application processors only support two microphones. Moreover, these systems typically must be always on and battery powered, which is a difficult task for high power application processors. So how do design engineers implement beamforming solutions that support up to seven different microphone inputs at 24 hours without interruption and with the lowest power consumption? One way is to connect the microphone array to a low-power iCE40 UltraPlus FPGA.
The iCE40 UltraPlus FPGA connects to the audio processor through a variety of industrial interfaces such as I2S, soundwire, SlimBus, and more. As with any FPGA-based solution, design engineers can build highly customized solutions and bring them to market quickly with on-chip embedded DSP, logic and memory resources.
Data caching application
The fourth is the data caching application. Many battery-powered devices require real-time sensor caching to perform sensing and detection acceleration while the application processor is in sleep mode. These devices must mask false wake-ups, allowing the application processor to be in sleep mode for longer periods of time. In this type of application, the iCE40 UltraPlus FPGA can be used between various sensors and application processors to handle wake-up triggers, such as double-clicking or â€œshake-and-wakeâ€ techniques on pedometers. Similar applications include motion detection and fingerprints, gestures or iris scans.
The advantage of the iCE40 UltraPlus FPGA is that it is cached because its own devices are low-power and low-power in the cache.
Signal aggregation application
The fifth is signal aggregation applications. Typically, there are typically two PCBs surrounding the battery of the mobile device. These PCBs are typically connected using flexible cables that provide limited EMI shielding. The flexible cable is limited to two layers to minimize cost. As a result, board layout engineers may need to address the challenge of transmitting up to 40 signals on a two-layer cable with signal ringing and other reliability issues.
Aggregating many of these systems with the exclusive features of the iCE40 UltraPlus FPGA is a way to simplify this. By placing the iCE40 UltraPlus FPGA next to the sensor, PCB design engineers can aggregate and transmit multiple different signals to the application processor using a simple single or dual pin interface.
It is reported that although the iCE40 UltraPlus has not yet been officially shipped, evaluation samples and development boards have been released.
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