Influence of process parameters on microgroove defect formation and improvement of microgroove defects

Abstract: As the density of integrated circuits continues to increase, the line width of polysilicon gates continues to decrease, the thickness of gate oxide layers continues to thin, and the etching of polysilicon becomes more and more critical. Key features such as topography control of polysilicon gates and loss of gate oxide silicon dioxide have received widespread attention. Another phenomenon in polysilicon etching: microtrench defects are also becoming more important. This phenomenon can cause large-area leakage of the device, which seriously kills each die and causes the wafer to be scrapped. Through related experiments, the author discusses the formation and control of micro-groove defects from the perspective of process parameters, and conducts group experiments on the influence of main process parameters on micro-groove defects to completely prevent micro-groove defects in order to optimize process parameters. Provide the necessary guidance.

1 Introduction

Polysilicon etching plays a vital role in the manufacturing process of integrated circuit chips. The control of line width and shape is very important and has been widely concerned. However, micro-groove defects (Fig. 1, cross-sectional view of micro-groove defects) are easily overlooked, because the usual visual inspection, microscopic inspection is not easy to find the defect [1-3]. However, micro-groove defects have a fatal effect on device performance, and once the device leakage is rapidly increased, various failures of the device are caused [4]. The micro-trench defect is that during the polycrystalline etching process, the reactive ions strike the underlying gate oxide layer, causing the gate oxide layer to be partially broken down, forming a trench on the silicon substrate. Because it is very small, the diameter is only 0.05 ~ 0.2 μm, the depth is only 2 000 ~ 5 000 A, so it is called micro-groove defect [5,6]. This defect is easily formed in a technique of line width of 0.35 μm or less, mainly because the gate oxide layer is thin (less than 50 A), and it is difficult to block the impact of ions. Therefore, it is necessary to optimize the menu of the etching process. While obtaining the vertical shape, it is also necessary to find a suitable process window, develop a powerful process menu, and completely eliminate the micro-groove defects.

In actual production, the mainstream equipment for polysilicon etching is a reactive ion etching device, and both have independently adjustable two sets of RF power, ie, source power and bias power, both using chlorine gas and hydrogen bromide gas as main etching gases. There is also a mixture of oxygen and helium that adjusts the ratio of choice. In this experiment, we performed a large-scale adjustment of the main parameters of the main process parameters: cavity pressure, source power, bias power, and chlorine/hydrogen bromide gas ratio in the main etching process step (end point monitoring step). The test piece was etched by the end point detection method, and the number of defects on the edge of the polysilicon was carefully observed by scanning electron microscopy to judge the influence of the parameter on the micro-groove defect, and the reasons for the formation of the defect were explained accordingly, and the improvement measures were proposed. .

2 experiment

2.1 Experimental conditions

In the main etching step of polysilicon etching, the ratios of cavity pressure, source power, bias power (Bias power) and chlorine/hydrogen bromide gas are separately grouped. The experimental conditions are as follows:

Group 1, cavity pressure grouping: 3 mT, 5 mT, 10 mT, 20 mT.

Group 2, source power grouping: 150 W, 200 W, 250 W, 300 W.

Group 3, bias power grouping: 50 W, 100 W, 150 W, 200 W

Group 4, chlorine/hydrogen bromide gas ratio group: 25 / 75, 33 / 66, 50 / 50, 66 / 33 (unit: SCCM)

Note: The menu of the standard main etching step is: chamber pressure 10 mT, source power 200 W, bias power 75 W, chlorine/hydrogen bromide gas 33 / 66 SCCM, oxygen - helium 5 SCCM. End point monitoring: 97%.

2.2 Observation structure

In order to facilitate the observation of the degree of micro-groove defects after etching, we have designed a special pattern structure.

In a square area of ​​3.3 μm × 3.3 μm, a number of polycrystalline lines (Lines) with a line width of 0.3 μm were designed with a pitch of 0.3 μm (Space). That is, the ratio of Line to Space is 1:1, and there are six lines and five spaces.

Scanning electron microscopy was used to observe whether there were micro-groove defects between the two polysilicon lines at the edge of the polysilicon. Generally, the magnification is observed at a magnification of 10 K to 50 K, and the suspicious point is found at a magnification of 10 K, and the presence of the defect is confirmed at a magnification of 50 K.

2.3 Polysilicon sample preparation

After the surface of the silicon wafer is cleaned, a 50 A thermal oxide layer is deposited, and 3 000 A of polysilicon is deposited by a LPCVD furnace tube. The DUV lithography machine is exposed to form a test pattern for etching. The topography of the photoresist must meet the requirements, ie vertical topography (greater than 88 °C) and no residual film residue.

2.4 Defect level

In order to facilitate the qualitative and quantitative analysis of the corresponding relationship between the process parameters and the number of micro-groove defects, we describe the degree of micro-groove defects as shown in Table 1.

3 Experimental results

The results of the four sets of experiments (see Figure 2, Figure 3, Figure 4 and Figure 5) indicate:

(1) Cavity pressure changes have a major impact on the generation of micro-groove defects. It can be seen from the line graph that the micro-groove defects become more and more serious as the cavity pressure decreases. At 3 mT, it is often found that many tiny grooves in some areas will gradually join to form a long groove. The groove (greater than 0.5 μm) indicates that the micro-groove defect is already very serious.

(2) The change in source power has little effect on the generation of micro-groove defects. No micro-groove defects were observed in the range of 150 W to 300 W. Since it is not necessary to use a source power greater than 300 W in practical applications, no further experiment to increase the source power was performed.

(3) Bias power has a significant impact on the generation of micro-groove defects. It can be seen from the line graph that as the bias power increases, the micro-groove defects become more and more serious when the bias power reaches a certain value, and the number of micro-groove defects increases sharply.

(4) The change of the chlorine/hydrogen bromide gas ratio has little effect on the micro-groove defects, but the chlorine gas rises too much. When the chlorine/hydrogen bromide gas ratio reaches a 2:1 ratio, a moderate amount of micro-grooves will also be formed. Slot defect.

4 Formation mechanism of micro-groove defects and analysis of experimental results

The formation of micro-groove defects has been generally considered to be related to the reflection of reactive ions, and Figure 6 is a simplified schematic. In the cavity, the reactive ions collide downward, and some ions impinge on the sidewalls of the polysilicon lines, which are reflected to the edge of the polysilicon, causing the local area to be particularly powerful, and the gate oxide layer in these regions is first broken down. Once the oxide layer is broken down, the reactive ions rapidly etch the silicon substrate to form micro-grooves. It is obvious that the gate oxide under the polysilicon acts as a barrier and protection for the formation of microchannel defects. As long as the gate oxide layer is sufficiently strong and thick enough, there is no opportunity to form microchannels. However, the thickness of the gate oxide layer is determined by the performance of the device. The 0.35 μm technology generally has a gate oxide thickness of about 50 to 60 A and a 0.18 μm technique of about 20 to 30 A. This thickness is not sufficient to block microchannel defects. form.

The reflection of reactive ions in the cavity is objective and unavoidable under current conditions. However, it takes energy for the reactive ions to bombard the oxide layer. If the energy is not large enough, the oxide layer cannot be broken through the entire etching time, and the micro-channel defects cannot be formed.

Therefore, the energy of the reactive ions plays a decisive role in the formation of microgroove defects. The greater the energy, the greater the bombardment force of the ions on the gate oxide layer, and the greater the possibility that the oxide layer is partially destroyed, the easier it is to form microchannel defects.

The results of the above four groups of tests were analyzed.

(1) When the pressure of the chamber is lowered, the energy of the reactive ions is significantly increased. There are a large number of ions in the etched cavity. The ions in these movements have a certain amount of energy (kinetic energy). As these ions move, they will collide with each other continuously, and the collision will lose energy, eventually leading to impact polysilicon. The ion energy of the sidewalls of the lines is reduced.

However, as the pressure of the chamber decreases, the mean free path of the ions becomes longer. The average free path is long, the probability of collision between ions is reduced, and the energy loss of ions is greatly reduced.

Therefore, the lower the pressure, the greater the energy of the reactive ions, the more easily the gate oxide layer is broken down by bombardment, and the degree of microgroove defects is significantly increased.

(2) The change of the source power mainly affects the density of the reactive ions, that is, the number of reactive ions per unit volume, and does not increase the energy of the reactive ions. Therefore, its increase does not contribute to the change in the number of micro-groove defects, but the increase in source power will increase the rate of etching slightly.

(3) The change in bias power plays a direct role in the change of ion energy. In reactive ion etching, the bias voltage is negative and the reactive ions are positive. The electric field generated by the negative bias can significantly accelerate the velocity of the ions downward (toward the surface of the silicon wafer), resulting in a significant increase in the force of the impact. Therefore, the energy of the reactive ions increases as the bias power increases, and the degree of microgroove defects increases.

(4) The chlorine gas/hydrogen bromide gas is mainly used to adjust the etching selectivity ratio of polysilicon to silicon dioxide, and does not affect the energy change of the reactive ions.

It is precisely because the ratio affects the selection ratio, when the chlorine gas is excessively increased, that is, the chlorine gas/hydrogen bromide gas ratio is increased, the etching rate of the bottom silicon dioxide is also increased, and the silicon dioxide is relatively easily etched, so that Silicon oxide does not provide a barrier protection to form microchannel defects.

5 Conclusion

The influence of process parameters on the formation of micro-groove defects is clarified by experiments. The influence of process parameters on the etching process and results of polysilicon is mutually constrained. In order to obtain a relatively vertical polysilicon morphology, a relatively large bias power is required. Low cavity pressure, which is detrimental to the control of microgroove defects.

It is generally recommended that the pressure not be lower than 10 mT and the bias power maintained below 100 W. In the development of polysilicon etching process, it is necessary to balance, multi-scale optimization, and do a comprehensive inspection of the process window, so that it can not be lost, so as to provide a sufficiently powerful process menu for production.

references

[1] Michael A. Lieberman, Alan J. Lichtenberg. Principles of Plasma Discharges and Materials Processing, 2nd Edition [M].

[2] Stanley Wolf, Richard N. Tauber. Silicon Processing for the VLSI Era, Vol. 1: Process Technology 2nd Edition [M].

[3] Wai-Fah Chen.VLSI Technology[M].

[4] Yan Liren et al. Micro-nano scale manufacturing engineering [M]. Electronic Industry Press, 2011.

[5] S.Van Nguyen, D.Dobuzinski, SRStiffler, G.Chrisman.Ion scattering from sloped sidewall surfaces [J]. Electrochem. Soc, 1991, (138)1112 .

[6] Robert J. Hoekstra, Mark J. Kushner, Valerity Sukharev, Phillipe Schoenborn, J. Vac. Sci. Microtrenching resulting from specular reflection during chlorine etch of silicon [J]. Technol B, 1998, 16(4).