Low-cost automotive multi-bus bridging using FPGA

The electronic systems in automobiles continue to grow rapidly, so it will be instructive to compare the development of automotive electronics and the development of consumer electronic portable products. Today's consumers want the convenience and comfort that handheld electronic devices offer in their cars. Automotive electronics will no longer be limited to engine management systems or body controls, but will expand into new areas such as infotainment, communications, and driver/passenger assistance systems.

A serious challenge is to ensure that the life of the car matches the life of the in-vehicle electronics in order to avoid additional costs due to outdated technology and equipment elimination. From 8-track record players to audio tape players, CD players to MP3 players, such rapid development reminds automotive design engineers that the life cycle of in-vehicle electronic devices is relatively short. The generation and variation of automotive standards further leads to the selection of standards that must take into account their longevity, flexibility and acceptance. Currently used standards are mainly LIN, CAN Media Oriented System Transport (MOST) and Bluetooth technology.

Other challenges faced by automotive electronics component designers include meeting low cost targets, expanding temperature ranges, and miniaturization requirements. FPGAs have evolved over the past 10 years to provide higher performance, lower power consumption, wider operating temperature range, smaller size and lower cost, so the more FPGAs are designed for automotive designers. The bigger the attraction.

According to industry analyst firm Gartner Dataquest (November 2003), the global automotive electronics application market was approximately $73.2 million in 2003, reaching $77.9 million in 2004 and $85.3 million in 2005. The main automotive electronics systems include GPS navigation systems, engine control units and digital stereo systems.

Advantages of FPGA

Thanks to the reprogrammable flexibility of the FPGA, the new standard can be quickly implemented, which is still possible after the field deployment is complete. And there is no need to physically disassemble the FPGA, which can be done through standard programming protocols such as IEEE1149.1JTAG. This allows the designer to upgrade the in-vehicle electronic system like an adjustment engine.

Of course, the car models are varied, from economy to standard to luxury. Therefore, the electronic equipment in the car also varies from vehicle to car. And through the advantages of FPGA reprogrammability and flexibility, automotive design engineers can offer different combinations of features from standard to luxury on the same platform. For ASICs, the inflexibility of the high NRE and ASIC bridges has allowed them to be excluded from viable solutions. Although ASIC has the advantage of lower manufacturing costs.

Bridging function

A microprocessor or microcontroller is the heart of an electronic system. There are many solutions for bridging between two popular automotive bus protocols (LIN and MOST) and microprocessor or microcontroller interfaces at low cost. The key to the success of these applications is the FPGA's flexible architecture and reprogrammability, making it easy to bridge multiple microprocessors or microcontrollers, giving designers maximum flexibility. To implement new requirements or to modify existing designs without changing components, simply reprogram the FPGA.

IP cores for automotive bus standards such as LIN and CAN are now available. LIN is a low-cost single-wire (12V bus) serial communication protocol based on the Universal Serial Communication Interface (UART) data format and a single-master/multi-slave concept designed to meet the needs of distributed electronic systems in automobiles. This low-cost network system is used to connect distributed nodes with relatively low communication requirements, primarily for automotive applications that use smart sensors, regulators or lighting. Rather than replacing high-performance networks such as CAN.

The synchronization mechanism is a feature of LIN that allows recovery of clocks with slave nodes without the need for a quartz or ceramic oscillator. The line driver and receiver specifications are in accordance with the ISO9141 single line standard with additional enhancements. The maximum transmission rate is 20 kbps. This limitation stems from EMI considerations and clock synchronization mechanisms.

A LIN network consists of a master node and one or more slave nodes. All nodes include slave communication tasks that perform transmission and reception tasks, while the master node also includes additional master transmission tasks. The communication of the LIN network is always initiated by the master task, first sending a message header consisting of a synchronization interrupt, a sync byte and a message identification. Only one slave task receives and filters the identifier at the same time, sending a message response. The response consists of two, four, or eight data bytes and one check byte. The message header and the response part together form a message frame.

Clock synchronization, the simplicity of UART communication, and single-wire media are the main reasons for the lower cost of LIN. Achieving low-cost, low-speed LIN requires an appropriate amount of FPGA resources, requiring approximately 500 LUTs and 42 I/Os.

MOST technology provides a low-cost, low-cost network interface to connect simple multimedia devices, supporting both low-smart devices and complex DSP-based devices that require advanced control and multimedia capabilities. This feature greatly enhances the flexibility of the entire automotive communication system. On the whole, MOST is a high-performance, low-cost multimedia fiber network technology based on synchronous data communication. Ideal for multimedia applications in automobiles such as analog audio gateways, analog video interfaces, digital video display interfaces, navigation and communications. The MOST standard has different layers, such as the physical layer, the data transceiving link layer, the transport layer, the session layer, and other layers. Can cover a wide range of applications from kbps to 24.8Mbps.

At the same time, MOST is still a synchronous network. The clock is provided by a timing master and all other devices are synchronized to this clock. This technology avoids buffering and sample rate conversion, so it can be connected to very simple and inexpensive devices. This technology is similar to a switched telephone network where data channels and control channels are defined separately. The control channel is used to determine which data channel the sender and receiver are using. Once the connection is established, the data can be transmitted continuously without the need to process additional packet information. This is an ideal mechanism for data streaming.

Key benefits of the MOST network include: ease of use, low cost implementation, wide range of applications, synchronous and asynchronous bandwidth, flexibility and compliance with the consumer and personal computer industries.

save costs

Utilizing the inherent flexibility and reprogrammability of the FPGA, it is possible to simplify the bridging of various automotive bus standards with microprocessor or microcontroller interfaces on a single platform. And enable automakers to use the same FPGA to meet the different requirements of different grades of automotive, from economical to luxury. This simplifies inventory management and captures volume price concessions, reducing the cost of R&D, production, service and logistics.

The cost-saving advantages of using FPGAs continue throughout the life of the car. By reprogramming and reconfiguring, FPGAs can complete product upgrades without paying additional engineering costs, which is unavoidable when sampling ASICs. In addition, some FPGA manufacturers offer density-enhanced capability in package-compatible situations, providing greater logic capacity without changing the original PCB design, extending the life of the electronics platform as system requirements change.

These capabilities and advantages not only make FPGA devices more attractive to designers, but also allow them to freely choose a microprocessor or microcontroller. With FPGAs, designers can choose cost-optimized microprocessors or microcontrollers as needed, or choose feature-rich products. This flexibility directly reduces the overall solution cost of automotive electronics systems.

LatTIceECP and LatTIceECFPGA also offer a unique cost saving feature that supports standard SPI memory configurations. Traditionally, SRAM-based FPGAs require the use of a proprietary, non-volatile, imported PROM from a FPGA vendor. These PROMs account for more than 35% of the total FPGA solution cost. In contrast, low-cost, industry-standard SPI memory is ideal for high-volume applications. SPI memory configuration time is fast, low cost and takes up less PCB space. With ECP and EC devices, LatTIce is the first FPGA vendor to offer SPI memory configuration support.


As new automotive standards continue to emerge, the main consideration for automotive designers is the interface with maximum flexibility and adaptability. The LatTIceECP and LatticeEC families provide excellent functionality, performance and value for interface implementation. Utilizing a very efficient architecture (high-volume, 130nm production technology), these low-cost FPGAs provide DSP blocks, sysMEM for embedded RAM blocks, distributed memory, sysCLOCKPLLs, DDR memory interfaces, and system IO buffers, making them ideal for automotive applications. application. Using these devices, automotive designers can adapt to changes in automotive standards, easily adopt new standards during product development, and reduce total cost by 30% to 50% compared to existing FPGA solutions.

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